bespoke-silicon-group / basejump_stl

BaseJump STL: A Standard Template Library for SystemVerilog

Date Created 2019-04-04 (5 years ago)
Commits 1,632 (last one 6 days ago)
Stargazers 536 (0 this week)
Watchers 30 (0 this week)
Forks 99
License other
Ranking

RepositoryStats indexes 600,333 repositories, of these bespoke-silicon-group/basejump_stl is ranked #87,278 (85th percentile) for total stargazers, and #73,478 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #18/183.

Other Information

bespoke-silicon-group/basejump_stl has 62 open pull requests on Github, 379 pull requests have been merged over the lifetime of the repository.

Github issues are enabled, there are 101 open issues and 85 closed issues.

Homepage URL: http://bjump.org/

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Recent Commit History

178 commits on the default branch (master) since jan '22

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Languages

The primary language is SystemVerilog but there's also others...

updated: 2025-01-05 @ 03:36am, id: 179529893 / R_kgDOCrNopQ