bunny965 / yolov5-fpga-hardware-acceleration

网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添加外部存储及DDR

bunny965
bunny965
Date Created 2023-06-13 (about a year ago)
Commits 17 (last one about a year ago)
Stargazers 100 (0 this week)
Watchers 1 (0 this week)
Forks 14
License gpl-3.0
Ranking

RepositoryStats indexes 641,700 repositories, of these bunny965/yolov5-fpga-hardware-acceleration is ranked #310,063 (52nd percentile) for total stargazers, and #563,745 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #258/639.

Other Information

bunny965/yolov5-fpga-hardware-acceleration has Github issues enabled, there are 5 open issues and 0 closed issues.

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

17 commits on the default branch (main) since jan '22

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Yearly Commits

Commits to the default branch (main) per year

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Issue History

Total Issues
Open Issues
Closed Issues
554.54.5443.53.5332.52.5221.51.5110.50.500Oct '23Oct '23Nov '23Nov '23Dec '23Dec '2320242024Feb '24Feb '24Mar '24Mar '24Apr '24Apr '24May '24May '24Jun '24Jun '24Jul '24Jul '24Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25Mar '25Mar '25Apr '25Apr '25

Languages

The primary language is Verilog but there's also others...

VerilogVerilogPythonPythonVHDLVHDLVV

updated: 2025-04-16 @ 08:51pm, id: 653204147 / R_kgDOJu8asw