Statistics for language Verilog
RepositoryStats tracks 579,582 Github repositories, of these 533 are reported to use a primary language of Verilog.
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FPGA modules used together with the PCILeech Direct Memory Access (DMA) Attack Software
The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product ...
tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clock domains and time-shared design
This repo contains code snippets written in verilog as part of course Computer Architecture of my university curriculum
FPGA modules used together with the PCILeech Direct Memory Access (DMA) Attack Software
The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product ...
tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clock domains and time-shared design
This repo contains code snippets written in verilog as part of course Computer Architecture of my university curriculum
FPGA modules used together with the PCILeech Direct Memory Access (DMA) Attack Software
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.
shadow+writemask for all caps. has WORKING logic for interrupts, but not this specific device. DONT BUY FROM DMANATION.
Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.
Tiny ASIC implementation for "The Era of 1-bit LLMs All Large Language Models are in 1.58 Bits" matrix multiplication unit
Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
pcileech-fpga with wireless card emulation (D-Link DWA-556 Xtreme N PCIe Desktop Adapter)
The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the FPGA can be monitored in a waveform.
Textbook and full source codes to learn basics of RISC-V pipelined CPU design using the Bluespec Hardware Design Language(s)