Statistics for topic fpga

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

Digital logic design tool and simulator

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

32-bit Superscalar RISC-V CPU

A simple implementation of a UART modem in Verilog.

AMD OpenNIC Project Overview

The complete codebase for Frame

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

32-bit Superscalar RISC-V CPU

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

Digital logic design tool and simulator

Build your hardware, easily!

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

The last Pcileech DMA CFW guide you will ever need.

A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration

The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA b...

Structural Netlist API (and more) for EDA post synthesis flow development

The complete codebase for Frame

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

Digital logic design tool and simulator

Build your hardware, easily!

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

The last Pcileech DMA CFW guide you will ever need.

Next Generation IDE for Electronics Development

KiCad PCB project of Logic Analyzer

Verilog implementation of PAL, NTSC and SECAM color encoding

DisplayPort IP-core

A Python library for converting images into FPGA-displayable pixel art.

An exquisite superscalar RV32GC processor.

Verilog package manager written in Rust

The last Pcileech DMA CFW guide you will ever need.

2023集创赛紫光同创杯一等奖项目

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

Digital logic design tool and simulator

Build your hardware, easily!

State-of-the-art native debugging tools

A Python library for converting images into FPGA-displayable pixel art.

A 3D FPGA GPU for real-time rasterization with a tile-based deferred rendering (TBDR) architecture, featuring transform & lighting (T&L), back-face culling, MSAA anti-aliasing, ordered dithering, etc.

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

Allo: A Programming Model for Composable Accelerator Design

A configurable and approachable tool for FPGA debugging and rapid prototyping.