Statistics for topic vhdl

Digital logic design tool and simulator

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

A huge VHDL library for FPGA development

Scala based HDL

A huge VHDL library for FPGA development

Digital logic design tool and simulator

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Scala based HDL

Digital logic design tool and simulator

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

cocotb: Python-based chip (RTL) verification

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

Image Processing Toolbox in Verilog using Basys3 FPGA

An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.

Image Processing Toolbox in Verilog using Basys3 FPGA

Digital logic design tool and simulator

VHDL library 4 FPGAs

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

Digital logic design tool and simulator

VHDL 2008/93/87 simulator

A FPGA friendly 32 bit RISC-V CPU implementation

cocotb: Python-based chip (RTL) verification

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

An open-source HDL register code generator fast enough to run in real time.

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

Network Development Kit (NDK) for FPGA cards with example application

An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.

ITC'99 benchmarks developed in the CAD Group at Politecnico di Torino

VS Code based debugger for hardware designs in Amaranth or Verilog

Digital logic design tool and simulator

A FPGA friendly 32 bit RISC-V CPU implementation

cocotb: Python-based chip (RTL) verification

VHDL 2008/93/87 simulator

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

An open-source HDL register code generator fast enough to run in real time.

Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments

Package manager and build tool for VHDL/SystemVerilog

A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration