Statistics for topic vhdl
RepositoryStats tracks 626,055 Github repositories, of these 94 are tagged with the vhdl topic. The most common primary language for repositories using this topic is VHDL (45). Other languages include: Python (14)
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:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
Image Processing Toolbox in Verilog using Basys3 FPGA
:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
An open-source HDL register code generator fast enough to run in real time.
A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
ITC'99 benchmarks developed in the CAD Group at Politecnico di Torino
VS Code based debugger for hardware designs in Amaranth or Verilog
:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
An open-source HDL register code generator fast enough to run in real time.
Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments
