6 results found Sort:

stnolting
neorv32 stnolting
202
1.5k
bsd-3-clause
50
:desktop_computer: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
cpu gdb rtl soc asic asip fpga rv32 vhdl riscv risc-v safety neorv32 openocd verilog embedded processor soft-core system-on-chip microcontroller
Created 2020-06-23
6,575 commits to main branch, last one 2 days ago
stnolting
neoTRNG stnolting
15
157
bsd-3-clause
6
🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
asic fpga trng vhdl random entropy neorv32 asic-design cryptography entropy-source ring-oscillator random-number-generators
Created 2021-11-21
83 commits to main branch, last one 2 months ago
stnolting
fpga_puf stnolting
17
120
bsd-3-clause
16
:key: Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
puf fpga vhdl neorv32 security fingerprint authentication key-generation
This repository has been archived (exclude archived)
Created 2021-11-16
25 commits to main branch, last one about a year ago
stnolting
riscv-gcc-prebuilt stnolting
8
78
gpl-2.0
7
📦 Prebuilt RISC-V GCC toolchains for x64 Linux.
gcc linux riscv rv32i risc-v neorv32 prebuilt-binaries
Created 2021-01-19
65 commits to main branch, last one 2 months ago
stnolting
neorv32-setups stnolting
15
57
bsd-3-clause
8
📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
soc fpga ghdl vhdl intel yosys risc-v xilinx lattice neorv32 verilog
Created 2022-01-11
419 commits to main branch, last one 3 days ago
stnolting
neorv32-verilog stnolting
9
47
bsd-3-clause
8
♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
asic fpga ghdl neorv32 verilog icarus-verilog
Created 2022-08-27
246 commits to main branch, last one 3 days ago