8 results found Sort:

242
1.7k
bsd-3-clause
51
:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Created 2020-06-23
8,147 commits to main branch, last one 5 days ago
22
175
bsd-3-clause
6
🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
Created 2021-11-21
103 commits to main branch, last one about a month ago
20
127
bsd-3-clause
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:key: Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
This repository has been archived (exclude archived)
Created 2021-11-16
25 commits to main branch, last one 2 years ago
📦 Prebuilt RISC-V GCC toolchains for x64 Linux.
Created 2021-01-19
65 commits to main branch, last one 11 months ago
16
73
bsd-3-clause
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♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
Created 2022-08-27
349 commits to main branch, last one 2 days ago
18
67
bsd-3-clause
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📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
Created 2022-01-11
553 commits to main branch, last one 2 days ago
Ada-language framework
Created 2021-07-30
3,589 commits to master branch, last one 4 days ago
8
29
bsd-3-clause
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✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
Created 2022-09-18
838 commits to main branch, last one 2 days ago