27 results found Sort:

FPGAwars
icestudio FPGAwars
247
1.7k
gpl-2.0
85
:snowflake: Visual editor for open FPGA boards
ide fpga blocks editor lattice verilog icestorm icestudio javascript
Created 2016-01-28
3,431 commits to develop branch, last one 7 hours ago
trabucayre
openFPGALoader trabucayre
268
1.2k
apache-2.0
39
Universal utility for programming FPGA
arty fpga gowin intel xilinx cyclone lattice bitstream trenz-gowin-littlebee
Created 2019-09-26
1,609 commits to master branch, last one 18 hours ago
FPGAwars
apio FPGAwars
140
807
gpl-2.0
37
:seedling: Open source ecosystem for open FPGA boards
cli apio fpga python lattice manager package verilog icestorm
Created 2016-02-09
1,945 commits to develop branch, last one 4 days ago
spawnmason
randar-explanation spawnmason
18
802
unknown
7
"Randar" is an exploit for Minecraft which uses LLL lattice reduction to crack the internal state of an incorrectly reused java.util.Random in the Minecraft server, then works backwards from that to l...
lll rng 2b2t radar munmap randar random exploit lattice papermc minecraft spawnmason spawnmasons exploitation lattice-reduction
Created 2023-06-28
87 commits to master branch, last one 8 months ago
openfheorg
openfhe-development openfheorg
196
784
bsd-2-clause
14
This is the development repository for the OpenFHE library. The current (stable) version is v1.2.3 (released on October 30, 2024).
cpp fhe lattice privacy cryptography homomorphic-encryption fully-homomorphic-encryption secure-multiparty-computation homomorphic-encryption-library
Created 2022-03-04
617 commits to main branch, last one about a month ago
mimoo
RSA-and-LLL-attacks mimoo
128
781
unknown
25
attacking RSA via lattice reductions (LLL)
rsa sage crypto lattice boneh-durfee cryptography
Created 2015-02-03
180 commits to master branch, last one 3 years ago
olofk
edalize olofk
194
650
bsd-2-clause
33
An abstraction library for interfacing EDA tools
eda fpga ghdl vhdl fossi yosys altera vivado xilinx lattice verilog icestorm modelsim spyglass synthesis verilator simulation riviera-pro systemverilog icarus-verilog
Created 2018-05-09
549 commits to main branch, last one 17 days ago
s-arash
ascent s-arash
18
431
mit
8
Logic programming in Rust
rust datalog lattice logic-programming declarative-language
Created 2021-09-19
143 commits to master branch, last one 9 days ago
f32c
f32c f32c
104
407
bsd-2-clause
50
A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz
fpga mips riscv altera xilinx arduino lattice
Created 2015-04-23
5,486 commits to master branch, last one a day ago
FPGAwars
icezum FPGAwars
108
342
gpl-3.0
56
:star2: IceZUM Alhambra: an Arduino-like Open FPGA electronic board
fpga board ice40 kicad icezum lattice alhambra
Created 2016-02-18
488 commits to master branch, last one 5 years ago
f4pga
f4pga-arch-defs f4pga
113
273
isc
25
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
hdl vpr fpga artix ice40 artix7 python sphinx kintex7 lattice verilog symbiflow synthesis toolchain primitives xilinx-fpga documentation verilog-simulator verilog-simulations architecture-definitions
Created 2017-11-16
5,223 commits to main branch, last one 3 months ago
Jamie-Cui
awesome-secure-computation Jamie-Cui
14
206
unlicense
7
Awesome list for cryptographic secure computation paper. This repo includes *Lattice*, *DifferentialPrivacy*, *MPC* and also a comprehensive summary for top conferences.
fss mpc pir psi paper papers lattice privacy awesome-list cryptography ot-extension paper-summary secure-protocols oblivious-transfer secure-computation differential-privacy homomorphic-encryption private-set-intersection private-information-retrieval privacy-enhancing-technologies
Created 2019-03-12
85 commits to master branch, last one 26 days ago
uw-x
tinysdr uw-x
27
172
mit
18
First SDR platform for IoT networks
sdr ecp5 atmel msp432 lattice tinysdr at86rf215 low-power long-range software-defined-radio
Created 2019-06-11
45 commits to main branch, last one 3 years ago
kelu124
un0rick kelu124
28
148
other
25
smallish ice40 / raspberrypi ultrasound hardware
ndt spi fpga ftdi hx4k imaging lattice hardware pulseecho ultrasound raspberry-pi
Created 2018-03-01
98 commits to master branch, last one 7 months ago
XiangyunHuang
msg XiangyunHuang
53
132
unknown
6
:book: 现代统计图形（人民邮电出版社出版） Modern Statistical Graphics
r grid ggplot2 lattice bookdown data-visualization modern-statistical-graphics
Created 2019-08-10
275 commits to master branch, last one 7 months ago
GuangchuangYu
ggplotify GuangchuangYu
11
106
unknown
6
ggplot everything
vcd grid rstats upsetr ggplot2 lattice baseplot
Created 2018-04-24
36 commits to master branch, last one 10 months ago
PyFPGA
pyfpga PyFPGA
10
94
gpl-3.0
3
A Python package to use FPGA development tools programmatically.
amd ise tcl fpga ghdl actel intel yosys altera libero python vivado xilinx lattice nextpnr quartus trellis icestorm microchip microsemi
Created 2021-02-10
502 commits to main branch, last one 2 years ago
iDoka
awesome-fpga-boards iDoka
11
90
unknown
10
:atm: Second life for FPGA boards which can be repurposed to DYI/Hobby projects ...............................................................................................
bmc ecp5 fpga jtag qsfp zynq intel pci-e altera xilinx awesome lattice antminer chubby75 ethernet microsoft colorlight awesome-list
Created 2020-12-14
5 commits to master branch, last one 3 years ago
Paebbels
JSON-for-VHDL Paebbels
16
76
other
14
A JSON library implemented in VHDL.
fpga ghdl json vhdl parser xilinx lattice modelsim questasim synthesis fileformat simulation
Created 2015-09-01
61 commits to master branch, last one 2 years ago
halfmanhalftaco
fpga-docker halfmanhalftaco
14
73
unknown
4
Tools for running FPGA vendor toolchains with Docker
fpga vhdl altera xilinx lattice quartus verilog
Created 2019-01-04
5 commits to master branch, last one 3 years ago
BrianHGinc
BrianHG-DDR3-Controller BrianHGinc
33
72
unknown
7
DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
hdl ddr3 fpga intel altera xilinx lattice verilog testbenches systemverilog
Created 2021-08-29
110 commits to main branch, last one 8 months ago
saforem2
l2hmc-qcd saforem2
9
67
apache-2.0
5
Application of the L2HMC algorithm to simulations in lattice QCD.
hmc mcmc hydra horovod lattice pytorch deepspeed tensorflow lattice-qcd monte-carlo gauge-theory deep-learning machine-learning hamiltonian-monte-carlo
Created 2019-03-21
6,366 commits to main branch, last one about a year ago
stnolting
neorv32-setups stnolting
18
65
bsd-3-clause
8
📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
soc fpga ghdl vhdl intel yosys risc-v xilinx lattice neorv32 verilog
Created 2022-01-11
520 commits to main branch, last one 21 hours ago
Parretto
DisplayPort Parretto
8
58
unknown
7
DisplayPort IP-core
fpga xilinx ip-core lattice displayport
Created 2022-06-13
37 commits to main branch, last one about a month ago
tomhanika
conexp-clj tomhanika
25
57
epl-1.0
5
A General-Purpose Tool for Formal Concept Analysis
data order clojure lattice data-science order-theory data-analysis closure-systems conceptual-knowledge formal-concept-analysis
Created 2011-11-09
2,840 commits to master branch, last one 3 months ago
MJoergen
HyperRAM MJoergen
11
49
mit
7
Portable HyperRAM controller
fpga vhdl artix intel altera avalon questa vivado xilinx lattice quartus hyperram modelsim questasim
Created 2022-01-07
164 commits to main_old branch, last one 2 months ago
leonow32
verilog-fpga leonow32
3
27
mit
3
Many peripherals in Verilog ready to use
cpld fpga altera machxo xilinx lattice machxo2 verilog systemverilog
Created 2023-07-05
362 commits to master branch, last one 5 months ago