45 results found Sort:

SpinalHDL
VexRiscv SpinalHDL
417
2.5k
mit
102
A FPGA friendly 32 bit RISC-V CPU implementation
cpu soc fpga vhdl riscv verilog softcore spinalhdl
Created 2017-03-08
1,607 commits to master branch, last one 16 days ago
deepfence
PacketStreamer deepfence
252
1.9k
apache-2.0
12
:star: :star: Distributed tcpdump for cloud native environments :star: :star:
soc pcap zeek snort secops suricata infosectools tcpdump-like hacktoberfest observability packet-capture packet-sniffer security-tools forensics-tools network-analysis traffic-monitoring
Created 2022-03-25
61 commits to main branch, last one about a year ago
ucb-bar
chipyard ucb-bar
648
1.6k
bsd-3-clause
86
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
rtl soc boom riscv chisel hwacha risc-v rocket firesim chipyard peripherals rocket-chip superscalar accelerators out-of-order chip-generator
Created 2016-10-24
4,976 commits to main branch, last one 15 hours ago
stnolting
neorv32 stnolting
224
1.6k
bsd-3-clause
50
:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
axi cpu rtl soc asip fpga rtos rv32 vhdl riscv risc-v safety neorv32 verilog embedded processor soft-core system-on-chip microcontroller on-chip-debbuger
Created 2020-06-23
7,442 commits to main branch, last one 4 days ago
TheresAFewConors
Sooty TheresAFewConors
208
1.3k
gpl-3.0
62
The SOC Analysts all-in-one CLI tool to automate and speed up workflow.
dns soc hash python urlscan analysis analysts phishing security workflow automation soc-analysts cybersecurity reputation-check proofpoint-decoder security-automation
Created 2019-06-06
335 commits to master branch, last one about a month ago
riscv-mcu
e203_hbirdv2 riscv-mcu
342
1.3k
apache-2.0
35
The Ultra-Low Power RISC-V Core
cpu soc core e203 fpga china riscv nuclei risc-v verilog low-power hummingbird
Created 2020-07-29
51 commits to master branch, last one 29 days ago
cyb3rxp
awesome-soc cyb3rxp
204
1.2k
cc0-1.0
35
A collection of sources of documentation, as well as field best practices, to build/run a SOC
soa soc tip ttp cert siem sirp soar csirt detection management purpleteam architecture mitre-attack risk-management incident-response
Created 2022-08-23
792 commits to main branch, last one 16 hours ago
xboot
xboot xboot
284
818
mit
52
The extensible bootloader for embedded system with application engine, write once, run everywhere.
os lua mtk soc boot xboot samsung rockchip allwinner freescale bootloader embedded-systems operating-system application-engine
Created 2010-01-14
5,481 commits to master branch, last one 11 months ago
satan1a
TheRoadOfSO satan1a
158
712
unknown
10
学习安全运营的记录 | The knowledge base of security operation
soc wiki cybersecurity knowledge-base threat-analysis security-analysis security-operation security-operations
Created 2020-03-21
199 commits to master branch, last one about a year ago
mthcht
awesome-lists mthcht
82
691
unknown
26
Awesome Security lists for SOC/CERT/CTI
ir cti ioc rmm soc dfir iocs siem redteam blueteam security detection hacktools ransomware awesome-list blueteam-tools threat-hunting incident-response threat-intelligence detection-engineering
Created 2022-12-11
9,498 commits to main branch, last one 8 hours ago
securityjoes
MasterParser securityjoes
57
671
mit
12
MasterParser is a powerful DFIR tool designed for analyzing and parsing Linux logs
ir mdr soc dfir cyber tools infosec security reporting automation powershell cyber-security dfir-automation digital-forensic incident-response
Created 2023-12-19
161 commits to main branch, last one 5 months ago
tenzir
tenzir tenzir
90
642
bsd-3-clause
35
Tenzir is the data pipeline engine for security teams.
soc pcap siem zeek sigma dataops netflow security suricata pipelines secdataops hacktoberfest investigation threathunting incident-response
Created 2010-09-23
22,605 commits to main branch, last one 10 hours ago
sergeykhbr
riscv_vhdl sergeykhbr
103
624
apache-2.0
53
Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
qt cpu soc vhdl riscv systemc debugger simulator
Created 2015-11-08
1,340 commits to master branch, last one 7 days ago
0x783kb
Security-Operation-Book 0x783kb
140
609
unknown
24
常见的攻击行为监测特征及方法，涵盖端点和流量，未包含PowerShell和Sysmon。预祝运营生活愉快！
soc attck security threat-hunting security-operation
Created 2019-07-10
801 commits to master branch, last one about a month ago
TonyPhipps
SIEM TonyPhipps
102
584
gpl-3.0
32
SIEM Tactics, Techiques, and Procedures
log red soc blue hunt scan siem team recon purple threat triage monitor analysis baseline incident response security forensics threat-hunting
Created 2018-08-02
416 commits to master branch, last one 15 days ago
Xilinx
Vitis_Accel_Examples Xilinx
213
504
mit
23
Vitis_Accel_Examples
soc acap zynq alveo vitis xilinx fpga-programming
Created 2019-10-13
1,878 commits to main branch, last one about a month ago
mthcht
ThreatHunting-Keywords mthcht
54
464
unknown
10
Awesome list of keywords and artifacts for Threat Hunting sessions
soc dfir iocs siem splunk redteam blueteam forensic elk-stack hacktools yara-rules awesome-list threathunting threat-hunting endpoint-security incident-response offensive-scripts offensive-security threat-intelligence detection-engineering
Created 2023-05-16
502 commits to main branch, last one a day ago
TonyPhipps
Meerkat TonyPhipps
82
435
gpl-3.0
31
A collection of PowerShell modules designed for artifact gathering and reconnaisance of Windows-based endpoints.
log red soc blue hunt scan siem team recon purple threat triage monitor analysis baseline incident response security forensics threat-hunting
Created 2018-02-08
507 commits to master branch, last one 9 hours ago
WangXuan95
USTC-RVSoC WangXuan95
75
354
gpl-3.0
14
An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC，包含一个简单且可扩展的外设总线。
cpu rtl soc fpga riscv rv32i risc-v verilog softcore systemverilog
Created 2019-02-05
66 commits to master branch, last one about a year ago
rggen
rggen rggen
43
328
mit
14
Code generation tool for control and status registers
apb axi csr eda ral rtl soc uvm amba asic fpga vhdl verilog wishbone-bus systemverilog uvm-ral-model wiki-documents uvm-register-model register-descriptions
Created 2019-04-10
378 commits to master branch, last one 3 months ago
eshlomo1
Microsoft-Sentinel-SecOps eshlomo1
63
240
mit
13
Microsoft Sentinel SOC Operations
ir soc siem azure secops hunting security microsoft cloudsecurity azure-sentinel threat-hunting incident-response microsoft-sentinel threat-intelligence
Created 2020-02-27
368 commits to master branch, last one 4 months ago
Staok
ARM-Linux-Study Staok
51
236
unknown
8
ARM Linux 的学习历程。包括应用、驱动、设备树，GCC, Make, CMake, Bash, Vim, Git 等等大集合内容。文章遵守 CC BY NC SA 4.0 协议。
arm dts gcc soc vim bash make cmake linux makefile driver-programming
Created 2021-04-03
56 commits to main branch, last one 3 months ago
ucb-bar
constellation ucb-bar
25
175
bsd-3-clause
18
A Chisel RTL generator for network-on-chip interconnects
noc rtl soc chisel hardware interconnect network-on-chip
Created 2021-10-04
410 commits to master branch, last one 2 months ago
Patrowl
PatrowlHears Patrowl
52
159
agpl-3.0
12
PatrowlHears - Vulnerability Intelligence Center / Exploits
api cpe cve soc cvss secops threat patrowl exploits automation threatintel cybersecurity threat-hunting vulnerabilities exploits-scripts threat-intelligence vulnerability-scanning vulnerability-detection vulnerability-intelligence vulnerability-identification
Created 2020-01-20
149 commits to master branch, last one 22 days ago
mthcht
Purpleteam mthcht
18
153
unknown
8
Purpleteam scripts simulation & Detection - trigger events for SOC detections
ioc soc siem linux awesome redteam tactics windows blueteam security detection purpleteam simulation techniques awesome-list mitre-attack threathunting threat-hunting offensive-scripts detection-engineering
Created 2022-12-05
720 commits to main branch, last one 19 days ago
SpinalHDL
SaxonSoc SpinalHDL
40
151
mit
23
SoC based on VexRiscv and ICE40 UP5K
rtl soc riscv
Created 2018-12-01
908 commits to dev-0.3 branch, last one 7 months ago
securityjoes
ForensicMiner securityjoes
18
148
mit
6
A really good DFIR automation for collecting and analyzing evidence designed for cybersecurity professionals.
ir edr mdr soc xdr dfir fast cyber cortex security forensics automation powershell crowdstrike
Created 2023-11-19
137 commits to main branch, last one 5 months ago
strath-sdr
RFSoC-Book strath-sdr
37
147
bsd-3-clause
8
Companion Jupyter Notebooks for the RFSoC-Book.
soc fpga pynq rfsoc jupyter
Created 2022-08-01
32 commits to main branch, last one about a year ago
ui-model
ui-model ui-model
23
146
unknown
6
UI Model major repository
soc react reuse angular library ui-model no-comonent
Created 2016-12-31
608 commits to master branch, last one 4 years ago
ControlCompass
ControlCompass.github.io ControlCompass
26
123
mit
6
Pointing cybersecurity teams to thousands of detection rules and offensive security tests aligned with common attacker techniques
soc siem infosec red-team security detection red-teaming intelligence mitre-attack cybersecurity security-tools threat-hunting security-operations threat-intelligence information-security detection-engineering
Created 2022-01-24
182 commits to main branch, last one 2 years ago