Xilinx / Vitis_Accel_Examples

Vitis_Accel_Examples

Xilinx
Xilinx
Date Created 2019-10-13 (5 years ago)
Commits 1,878 (last one about a month ago)
Stargazers 504 (0 this week)
Watchers 23 (0 this week)
Forks 213
License mit
Ranking

RepositoryStats indexes 579,238 repositories, of these Xilinx/Vitis_Accel_Examples is ranked #89,593 (85th percentile) for total stargazers, and #95,946 for total watchers. Github reports the primary language for this repository as Makefile, for repositories using this language it is ranked #161/1,163.

Other Information

Xilinx/Vitis_Accel_Examples has 1 open pull request on Github, 5 pull requests have been merged over the lifetime of the repository.

Github issues are enabled, there are 8 open issues and 75 closed issues.

There have been 7 releases, the latest one was published on 2021-10-27 (3 years ago) with the name 2021.1_rel2.

Homepage URL: http://xilinx.github.io/Vitis_Accel_Examples/

Star History

Github stargazers over time

Watcher History

Github watchers over time, collection started in '23

Recent Commit History

655 commits on the default branch (main) since jan '22

Yearly Commits

Commits to the default branch (main) per year

Issue History

Languages

The primary language is Makefile but there's also others...

Opengraph Image
Xilinx/Vitis_Accel_Examples

updated: 2024-11-05 @ 06:05am, id: 214885806 / R_kgDODM7lrg