13 results found Sort:

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
Created 2018-05-03
1,718 commits to master branch, last one a day ago
Vitis_Accel_Examples
Created 2019-10-13
1,878 commits to main branch, last one about a month ago
50
495
mit
22
Intermediate Language (IL) for Hardware Accelerator Generators
Created 2019-07-04
2,956 commits to main branch, last one 14 hours ago
92
325
apache-2.0
17
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
Created 2017-12-20
1,123 commits to main branch, last one 6 months ago
A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.
Created 2020-03-18
28 commits to master branch, last one 3 years ago
28
140
apache-2.0
10
Allo: A Programming Model for Composable Accelerator Design
Created 2023-07-21
238 commits to main branch, last one a day ago
8
134
mit
11
Time-sensitive affine types for predictable hardware generation
Created 2018-05-22
1,801 commits to master branch, last one 7 months ago
assorted library of utility cores for amaranth HDL
Created 2021-06-26
166 commits to main branch, last one about a month ago
11
79
bsd-3-clause
20
High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
Created 2021-12-08
27 commits to master branch, last one about a month ago
3
67
gpl-3.0
8
A new Hardware Design Language that keeps you in the driver's seat
Created 2022-08-08
444 commits to master branch, last one 16 hours ago
2
49
bsd-3-clause
14
A graph linear algebra overlay
Created 2021-06-18
95 commits to master branch, last one 3 years ago
Intel Quartus Prime Synthesis Engine for Docker
Created 2022-07-25
12 commits to master branch, last one 8 months ago
HeteroCL-MLIR dialect for accelerator design
Created 2021-11-18
1,145 commits to main branch, last one about a month ago