17 results found Sort:

162
838
mit
43
An Open-source FPGA IP Generator
Created 2018-06-14
8,176 commits to master branch, last one 7 days ago
An AXI4 crossbar implementation in SystemVerilog
Created 2021-09-23
50 commits to main branch, last one 6 months ago
24
122
unknown
15
An Open Source configuration of the Arty platform
Created 2016-09-26
398 commits to master branch, last one 4 years ago
25
106
lgpl-3.0
15
The Task Parallel System Composer (TaPaSCo)
Created 2019-01-15
2,392 commits to master branch, last one 7 months ago
45
91
bsd-3-clause
14
PYNQ example of using the RFSoC as a QPSK transceiver.
Created 2019-01-15
174 commits to master branch, last one about a year ago
A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw
Created 2022-09-16
5 commits to master branch, last one 2 years ago
Yet Another RISC-V Implementation
Created 2014-03-17
181 commits to master branch, last one 2 months ago
Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL
Created 2022-04-30
45 commits to main branch, last one 2 years ago
17
75
gpl-3.0
8
Z80 CPU for OpenFPGAs, with Icestudio
Created 2019-08-19
264 commits to master branch, last one 5 months ago
22
69
bsd-3-clause
6
RFSoC Spectrum Analyser Module on PYNQ.
Created 2020-02-21
156 commits to master branch, last one about a year ago
7
54
apache-2.0
8
SoftCPU/SoC engine-V
Created 2018-10-19
61 commits to master branch, last one about a year ago
14
51
mit
5
Original FPGA platform
Created 2011-07-21
3,159 commits to master branch, last one 10 days ago
Intel Quartus Prime Synthesis Engine for Docker
Created 2022-07-25
12 commits to master branch, last one 9 months ago
[SIGCOMM 2023] Lightning: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference
Created 2023-05-31
23 commits to main branch, last one about a year ago
My own FPGA architecture simulated in VHDL, realized with 7400-logic on PCB.
Created 2023-09-04
93 commits to main branch, last one 7 months ago
Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP
Created 2021-06-23
1 commits to main branch, last one 3 years ago
A textbook on understanding system on chip design
Created 2023-03-21
19 commits to main branch, last one about a year ago