michaelehab / AES-Verilog

Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL

Date Created 2022-04-30 (2 years ago)

Commits 45 (last one 2 years ago)

Stargazers 80 (0 this week)

Watchers 2 (0 this week)

Forks 20

License unknown

Ranking

RepositoryStats indexes 579,238 repositories, of these michaelehab/AES-Verilog is ranked #335,119 (42nd percentile) for total stargazers, and #475,806 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #264/533.

michaelehab/AES-Verilog is also tagged with popular topics, for these it's ranked: security (#2,906/3982), cryptography (#685/1016), encryption (#441/635), fpga (#296/474), verilog (#181/279), learn (#124/225)

Other Information

michaelehab/AES-Verilog has 1 open pull request on Github, 0 pull requests have been merged over the lifetime of the repository.

All Topics

aes rtl fpga learn aes-128 aes-192 aes-256 verilog fpga-soc security encryption fpga-board verilog-hdl cryptography aes-decryption aes-encryption verilog-project encryption-decryption

Star History

Github stargazers over time

Watcher History

Github watchers over time, collection started in '23

Recent Commit History

45 commits on the default branch (main) since jan '22

Yearly Commits

Commits to the default branch (main) per year

Issue History

Languages

The only known language in this repository is Verilog

updated: 2024-11-05 @ 04:23pm, id: 487368446 / R_kgDOHQym_g