michaelehab / AES-Verilog

Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL

Date Created 2022-04-30 (2 years ago)
Commits 45 (last one 2 years ago)
Stargazers 89 (0 this week)
Watchers 2 (0 this week)
Forks 20
License unknown
Ranking

RepositoryStats indexes 618,350 repositories, of these michaelehab/AES-Verilog is ranked #326,901 (47th percentile) for total stargazers, and #494,190 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #264/601.

michaelehab/AES-Verilog is also tagged with popular topics, for these it's ranked: security (#2,871/4163),  cryptography (#674/1058),  encryption (#436/659),  fpga (#289/503),  verilog (#180/299),  learn (#124/232)

Other Information

michaelehab/AES-Verilog has 1 open pull request on Github, 0 pull requests have been merged over the lifetime of the repository.

Star History

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Recent Commit History

45 commits on the default branch (main) since jan '22

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Issue History

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Languages

The only known language in this repository is Verilog

VerilogVerilog

updated: 2025-02-13 @ 02:38am, id: 487368446 / R_kgDOHQym_g