23 results found Sort:

LekKit
RVVM LekKit
55
826
gpl-3.0
21
The RISC-V Virtual Machine
c vm jit risc rvvm linux riscv risc-v riscv32 riscv64 emulator emulation emulators riscv-linux tracing-jit translation riscv-emulator riscv-simulator virtual-machine instruction-decoding
Created 2021-02-16
1,339 commits to staging branch, last one 23 days ago
chipsalliance
Cores-VeeR-EH1 chipsalliance
207
780
apache-2.0
57
VeeR EH1 core
rtl axi4 fpga risc veer riscv risc-v fusesoc riscv32 ahb-lite processor verilator asic-design western-digital open-source-hardware
Created 2019-06-02
125 commits to main branch, last one about a year ago
sysprog21
rv32emu sysprog21
85
337
mit
18
Compact and Efficient RISC-V RV32I[MAFC] emulator
riscv risc-v gdbstub riscv32 rv32imf emulator rv32imac bare-metal elf-parser jit-compiler riscv-emulator riscv-simulator virtual-machine remote-debugging instruction-set-simulator
Created 2020-10-16
904 commits to master branch, last one 3 days ago
cahirwpz
mimiker cahirwpz
49
294
bsd-3-clause
13
Simple unix-like operating system for education and research purposes
os kernel aarch64 riscv32 riscv64 educational
Created 2015-11-17
1,598 commits to master branch, last one 3 months ago
mrLSD
riscv-fs mrLSD
17
276
mit
12
F# RISC-V Instruction Set formal specification
fs cpu isa riscv fsharp risc-v library riscv32 riscv64 risc-processor riscv-emulator riscv-simulator
Created 2019-08-28
183 commits to master branch, last one 4 months ago
chipsalliance
Cores-VeeR-EL2 chipsalliance
67
224
apache-2.0
24
VeeR EL2 Core
el2 rtl axi4 fpga riscv risc-v fusesoc riscv32 ahb-lite processor verilator asic-design western-digital open-source-hardware
Created 2020-01-09
372 commits to main branch, last one a day ago
tvlad1234
pico-rv32ima tvlad1234
12
210
other
7
Running Linux on RP2040 with the help of RISC-V emulation
linux risc-v rp2040 riscv32 buildroot riscv-emulator
Created 2023-02-23
56 commits to main branch, last one about a year ago
google
esh google
33
198
apache-2.0
8
UART based embedded shell for embedded systems. Intended to be used for learning, experimenting and diagnostics.
gdb qemu armv8 shell linker risc-v aarch64 bringup riscv32 riscv64 assembly cortex-m embedded baremetal bare-metal bootloader arm-assembly nucleo-f401re tiva-c-series arm-architecture
Created 2021-08-31
150 commits to main branch, last one 6 months ago
franzflasch
riscv_em franzflasch
23
128
gpl-3.0
8
Simple risc-v emulator, able to run linux, written in C.
c rv32 rv64 linux riscv risc-v riscv32 riscv64 uclinux emulator risc-v64 riscv-em embedded-c riscv-linux riscv-emulator risc-v-emulator embedded-systems
Created 2019-01-08
142 commits to master branch, last one 3 months ago
drom
awesome-riscv drom
13
117
unknown
15
😎 A curated list of awesome RISC-V implementations
riscv risc-v awesome riscv32 riscv64 awesome-list hacktoberfest
Created 2019-10-06
38 commits to master branch, last one about a year ago
dpretet
axi-crossbar dpretet
23
91
mit
2
An AXI4 crossbar implementation in SystemVerilog
arm soc amba asic axi4 fpga riscv riscv32 riscv64 verilog crossbar fpga-soc monodraw axi4-full axi4-lite processor asic-design interconnect axi4-protocol
Created 2021-09-23
50 commits to main branch, last one 13 days ago
tommythorn
yarvi tommythorn
21
81
isc
13
Yet Another RISC-V Implementation
fpga riscv risc-v riscv32 verilog fpga-soc
Created 2014-03-17
179 commits to master branch, last one 4 months ago
svenssonjoel
lispBM svenssonjoel
4
81
gpl-3.0
6
An interpreter for a concurrent lisp-like language with message-passing and pattern-matching implemented in C.
lisp repl esp32 nrf52 zephyr chibios riscv32 stm32f4 language concurrency interpreter quasiquotation microcontroller pattern-matching programming-language functional-programming
Created 2018-10-14
2,195 commits to master branch, last one a day ago
ultraembedded
exactstep ultraembedded
14
80
bsd-3-clause
6
Instruction set simulator for RISC-V, MIPS and ARM-v6m
mips armv6 mips32 risc-v riscv32 riscv64 riscv-simulator instruction-set-simulator
Created 2019-10-21
46 commits to master branch, last one 2 years ago
inpyjama
c-ninja-listings inpyjama
294
74
unknown
8
Lower level assembly and C baremetal programming on RISC-V CPUs. Source code listings from the C-Ninja, in Pyjama! book.
c risc-v riscv32 makefile baremetal linker-script assembly-language
Created 2023-08-19
49 commits to main branch, last one 21 days ago
risc0
risc0-lean4 risc0
3
47
apache-2.0
20
A model of the RISC Zero zkVM and ecosystem in the Lean 4 Theorem Prover
lean zkvm lean4 risc0 riscv risc-v riscv32 zk-stark riscv32im zero-knowledge
Created 2022-11-26
281 commits to main branch, last one about a year ago
splinedrive
lets_build_a_compiler_for_riscv splinedrive
7
46
other
3
A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw
c riscv spike riscv32 compiler crenshaw fpga-soc tutorial riscv-asm riscv-sim riscv-assembly computer-science compiler-construction
Created 2022-09-16
5 commits to master branch, last one about a year ago
OpenMachine-ai
tinyfive OpenMachine-ai
5
44
mit
3
TinyFive is a lightweight RISC-V emulator and assembler written in Python with neural network examples
ai ml riscv risc-v riscv32 assembly compiler assembler riscv-asm riscv-assembly riscv-emulator riscv-assembler riscv-simulator machine-learning risc-v-simulator risc-v-32-simulation
Created 2022-11-24
133 commits to main branch, last one 7 months ago
lupyuen
zig-bl602-nuttx lupyuen
2
33
apache-2.0
4
Zig on RISC-V BL602 with Apache NuttX RTOS and LoRaWAN
iot zig lora bl602 bl604 nuttx lorawan pinedio riscv32 pinecone
Created 2022-05-24
243 commits to main branch, last one about a year ago
sfranzyshen
arduino-bl808 sfranzyshen
0
33
lgpl-2.1
11
Arduino Core for Bouffalo Labs's RISC-V BL808 SOC
m1s maix ox64 bl808 pine64 risc-v sipeed arduino riscv32 riscv64 m1s-dock bouffalolab arduino-bl808
Created 2022-11-26
29 commits to main branch, last one about a year ago
agra-uni-bremen
BinSym agra-uni-bremen
3
31
mit
5
Symbolic execution for RISC-V machine code based on the formal LibRISCV ISA model
riscv riscv32 program-analysis symbolic-execution
Created 2023-05-16
132 commits to master branch, last one 2 days ago
jserv
rv32jit jserv
7
29
mit
4
JIT-accelerated RISC-V instruction set simulator
riscv risc-v riscv32 jit-compiler riscv-emulator riscv-simulator dynamic-binary-translation
Created 2023-10-02
32 commits to master branch, last one 5 months ago
rizwan3d
SharpRISCV rizwan3d
4
25
mit
4
SharpRISCV is an implementation of RISC-V assembly in C#. First RISC V Assembly that build windows executable file
riscv csharp risc-v riscv32 windows riscv-asm riscv-windows riscv-assembly riscv-emulator
Created 2023-09-07
260 commits to master branch, last one 23 days ago