martinKindall / risc-v-single-cycle

A Single Cycle Risc-V 32 bit CPU

martinKindall
martinKindall
Date Created 2022-12-21 (2 years ago)
Commits 29 (last one 2 years ago)
Stargazers 40 (0 this week)
Watchers 3 (0 this week)
Forks 2
License unknown
Ranking

RepositoryStats indexes 631,351 repositories, of these martinKindall/risc-v-single-cycle is ranked #545,559 (14th percentile) for total stargazers, and #417,031 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #160/195.

martinKindall/risc-v-single-cycle is also tagged with popular topics, for these it's ranked: riscv (#161/180)

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

4444443.53.5333333Nov '24Nov '2415 Nov15 NovDec '24Dec '2415 Dec15 DecJan '25Jan '2515 Jan15 JanFeb '25Feb '2515 Feb15 FebMar '25Mar '2515 Mar15 Mar

Recent Commit History

29 commits on the default branch (main) since jan '22

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Yearly Commits

Commits to the default branch (main) per year

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Issue History

No issues have been posted

Languages

The primary language is SystemVerilog but there's also others...

SystemVerilogSystemVerilogTclTclAssemblyAssembly

updated: 2025-03-25 @ 01:14am, id: 580967817 / R_kgDOIqDdiQ