10 results found Sort:

601
1.5k
bsd-3-clause
83
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Created 2016-10-24
4,649 commits to main branch, last one 17 hours ago
93
318
apache-2.0
17
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
Created 2017-12-20
1,123 commits to main branch, last one 2 months ago
101
310
other
25
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
Created 2019-06-04
1,549 commits to main branch, last one 3 months ago
31
217
apache-2.0
24
Fletcher: A framework to integrate FPGA accelerators with Apache Arrow
Created 2018-02-09
707 commits to develop branch, last one about a year ago
CSV spreadsheets and other material for AI accelerator survey papers
Created 2021-05-04
14 commits to main branch, last one 4 months ago
33
134
apache-2.0
10
HLS-based Graph Processing Framework on FPGAs
Created 2020-04-09
202 commits to master branch, last one about a year ago
18
107
other
21
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
Created 2019-04-01
461,606 commits to sycl/unified/master branch, last one 7 months ago
19
91
mit
15
Intel® Query Processing Library (Intel® QPL)
Created 2020-09-17
415 commits to develop branch, last one 3 days ago
17
79
mit
13
Intel® Data Mover Library (Intel® DML)
Created 2021-06-30
86 commits to develop branch, last one 10 days ago
The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
Created 2023-04-07
30 commits to main branch, last one about a month ago