12 results found Sort:

ucb-bar
chipyard ucb-bar
695
1.8k
bsd-3-clause
90
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
rtl soc boom riscv chisel hwacha risc-v rocket firesim chipyard peripherals rocket-chip superscalar accelerators out-of-order chip-generator
Created 2016-10-24
5,509 commits to main branch, last one a day ago
sld-columbia
esp sld-columbia
119
364
other
25
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
asic fpga riscv accelerators system-on-chip network-on-chip embedded-systems
Created 2019-06-04
1,616 commits to main branch, last one 2 months ago
cornell-zhang
heterocl cornell-zhang
93
336
apache-2.0
16
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
dsl fpga python compiler accelerators fpga-programming high-level-synthesis
Created 2017-12-20
1,123 commits to main branch, last one 11 months ago
abs-tudelft
fletcher abs-tudelft
31
225
apache-2.0
23
Fletcher: A framework to integrate FPGA accelerators with Apache Arrow
fpga arrow fletcher accelerators apache-arrow
Created 2018-02-09
707 commits to develop branch, last one about a year ago
areuther
ai-accelerators areuther
23
164
unknown
9
CSV spreadsheets and other material for AI accelerator survey papers
ai ml performance accelerators
Created 2021-05-04
14 commits to main branch, last one about a year ago
Xtra-Computing
ThunderGP Xtra-Computing
32
144
apache-2.0
9
HLS-based Graph Processing Framework on FPGAs
hls fpgas xilinx accelerators programmability graph-processing graph-analytic-algorithm
Created 2020-04-09
202 commits to master branch, last one 2 years ago
triSYCL
sycl triSYCL
21
116
other
21
SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
llvm sycl clang cpp20 trisycl oneapi-dpc xilinx-fpga accelerators xilinx-vitis dpc-toolchain sycl-compilation
Created 2019-04-01
461,633 commits to sycl/unified/master branch, last one 5 months ago
intel
qpl intel
22
103
mit
17
Intel® Query Processing Library (Intel® QPL)
qpl avx512 x86-64 library compression performance accelerators decompression
Created 2020-09-17
611 commits to develop branch, last one 3 days ago
intel
DML intel
18
93
mit
13
Intel® Data Mover Library (Intel® DML)
crc dml avx512 memory x86-64 performance accelerators
This repository has been archived (exclude archived)
Created 2021-06-30
104 commits to develop branch, last one 15 days ago
SET-Scheduling-Project
SET-ISCA2023 SET-Scheduling-Project
7
65
unknown
1
The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
dnn many-core scheduling inter-layer accelerators
Created 2023-04-07
40 commits to main branch, last one about a month ago
MPSLab-ASU
dMazeRunner MPSLab-ASU
11
45
mit
3
dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
performance accelerators deep-learning machine-learning energy-efficiency analytical-modeling performance-analysis compiler-optimization dataflow-accelerators design-space-exploration
Created 2019-07-30
25 commits to master branch, last one 3 years ago
jha-lab
acceltran jha-lab
10
39
bsd-3-clause
1
[TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
accelerators transformers
Created 2022-07-09
291 commits to main branch, last one about a year ago