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An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Created
2016-10-24
4,936 commits to main branch, last one 2 days ago
Open Source Architecture Code Analyzer
Created
2017-03-02
1,025 commits to master branch, last one 12 days ago
Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model
Created
2022-08-15
111 commits to master branch, last one a day ago
High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
Created
2023-08-17
7 commits to master branch, last one about a year ago
Advanced Architecture Labs with CVA6
Created
2022-12-21
93 commits to main branch, last one 8 months ago