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601

1.5k

bsd-3-clause

83

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

rtl soc boom riscv chisel hwacha risc-v rocket firesim chipyard peripherals rocket-chip superscalar accelerators out-of-order chip-generator

Created 2016-10-24

4,649 commits to main branch, last one 17 hours ago

218

839

other

53

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

boom fpga cloud risc-v firesim on-prem hardware datacenter simulation rocket-chip

Created 2018-05-13

5,999 commits to main branch, last one 2 days ago

48

69

other

24

Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.

qemu linux spike distro fedora firesim chipyard workload buildroot

Created 2017-07-17

933 commits to master branch, last one 9 days ago