22 results found Sort:
XLS: Accelerated HW Synthesis
Created
2020-05-07
6,321 commits to main branch, last one 12 hours ago
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
Created
2018-05-03
1,718 commits to master branch, last one a day ago
DaCe - Data Centric Parallel Programming
Created
2019-02-26
10,044 commits to main branch, last one 22 hours ago
Intermediate Language (IL) for Hardware Accelerator Generators
Created
2019-07-04
2,956 commits to main branch, last one 14 hours ago
NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
Created
2019-11-12
448 commits to develop branch, last one about a year ago
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
Created
2017-12-20
1,123 commits to main branch, last one 6 months ago
Veriloggen: A Mixed-Paradigm Hardware Construction Framework
Created
2015-06-21
1,990 commits to develop branch, last one about a year ago
Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
Created
2018-06-01
293 commits to master branch, last one 2 years ago
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
Created
2018-02-21
374 commits to master branch, last one 6 months ago
FPGA Accelerator for CNN using Vivado HLS
Created
2017-05-25
65 commits to master branch, last one 3 years ago
A Compiler for the Popr Language
Created
2012-10-07
1,802 commits to master branch, last one 3 years ago
PandA-bambu public repository
Created
2017-08-18
6,231 commits to main branch, last one 7 months ago
Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
Created
2018-02-24
107 commits to master branch, last one 2 years ago
Allo: A Programming Model for Composable Accelerator Design
Created
2023-07-21
238 commits to main branch, last one a day ago
Time-sensitive affine types for predictable hardware generation
Created
2018-05-22
1,801 commits to master branch, last one 7 months ago
CHARM: Composing Heterogeneous Accelerators on Versal ACAP Architecture
Created
2022-12-26
259 commits to main branch, last one 2 months ago
Polyphony is Python based High-Level Synthesis compiler.
Created
2015-11-30
470 commits to main branch, last one 5 years ago
A formally verified high-level synthesis tool based on CompCert and written in Coq.
Created
2019-10-02
1,204 commits to master branch, last one 4 months ago
High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
Created
2021-12-08
27 commits to master branch, last one about a month ago
A graph linear algebra overlay
Created
2021-06-18
95 commits to master branch, last one 3 years ago
HeteroCL-MLIR dialect for accelerator design
Created
2021-11-18
1,145 commits to main branch, last one about a month ago
FPGA acceleration of arbitrary precision floating point computations.
Created
2021-10-01
153 commits to main branch, last one 2 years ago