11 results found Sort:

Xilinx
Vitis-Tutorials Xilinx
560
1.3k
mit
53
Vitis In-Depth Tutorials
xrt fpga kria alveo vitis zcu102 zcu104 aiengine embedded kria-som alveo-u200 alveo-u250 embedded-systems
Created 2019-09-30
2,932 commits to 2024.2 branch, last one a day ago
Xilinx
XRT Xilinx
478
564
other
43
Run Time for AIE and FPGA based platforms
xrt fpga vitis linux-kernel
Created 2018-05-30
8,022 commits to master branch, last one 3 days ago
Xilinx
Vitis_Accel_Examples Xilinx
216
512
mit
23
Vitis_Accel_Examples
soc acap zynq alveo vitis xilinx fpga-programming
Created 2019-10-13
1,885 commits to main branch, last one about a month ago
pavel-demin
red-pitaya-notes pavel-demin
215
343
mit
54
Notes on the Red Pitaya Open Source Instrument
dsp mca nmr sdr tcl vna fpga wspr zynq linux radio vitis vivado xilinx verilog redpitaya red-pitaya
Created 2014-12-23
2,924 commits to master branch, last one a day ago
definelicht
hlslib definelicht
58
308
bsd-3-clause
18
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
hpc fpga cmake vitis xilinx sdaccel intel-fpga vivado-hls intel-fpga-opencl high-level-synthesis
Created 2018-02-21
374 commits to master branch, last one 8 months ago
fpgasystems
Vitis_with_100Gbps_TCP-IP fpgasystems
75
189
unknown
20
100 Gbps TCP/IP stack for Vitis shells
tcp vitis xilinx network-kernel
Created 2020-11-11
15 commits to vitis_2022_1 branch, last one 8 months ago
Xilinx
xup_vitis_network_example Xilinx
43
140
other
10
VNx: Vitis Network Examples
vnx alveo vitis xilinx alveo-card networking vitis-network
Created 2020-07-28
287 commits to master branch, last one 4 months ago
Xilinx
Vitis_Model_Composer Xilinx
30
80
unknown
13
Vitis Model Composer Examples and Tutorials
hls acap fpga vitis aiengine
Created 2020-10-12
2,170 commits to 2024.2 branch, last one 11 days ago
Xilinx
xup_compute_acceleration Xilinx
13
46
unknown
8
Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware
xup fpga vitis xilinx
Created 2020-05-28
133 commits to master branch, last one 5 months ago
spcl
apfp spcl
6
38
unknown
7
FPGA acceleration of arbitrary precision floating point computations.
gmp hls hpc fpga mpfr vitis bignum xilinx vivado-hls multiple-precision arbitrary-precision high-level-synthesis high-performance-computing
Created 2021-10-01
153 commits to main branch, last one 2 years ago
FedericoSerafini
HLS-CNN FedericoSerafini
8
32
mit
4
High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.
cnn hdl hls rtl fpga vitis stream hardware parallel pipeline synthesis accelerator high-level-synthesis
Created 2022-06-17
181 commits to main branch, last one 4 months ago