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Machine learning on FPGAs using HLS
Created
2017-10-25
2,408 commits to main branch, last one 3 days ago
DaCe - Data Centric Parallel Programming
Created
2019-02-26
10,074 commits to main branch, last one 24 hours ago
Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
Created
2018-06-01
293 commits to master branch, last one 2 years ago
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
Created
2018-02-21
374 commits to master branch, last one 8 months ago
Recipe for FPGA cooking
Created
2018-11-06
205 commits to master branch, last one 2 months ago
Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
Created
2018-02-24
107 commits to master branch, last one 3 years ago
[FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
Created
2020-05-13
376 commits to master branch, last one about a year ago
The second place winner for DAC-SDC 2020
Created
2020-07-08
5 commits to master branch, last one 2 years ago
Real-time binocular stereo vision FPGA system with OV5640 cameras
Created
2019-07-26
10 commits to master branch, last one 2 years ago
FPGA acceleration of arbitrary precision floating point computations.
Created
2021-10-01
153 commits to main branch, last one 2 years ago