9 results found Sort:

275
1.2k
other
40
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Created 2018-04-12
1,318 commits to master branch, last one 28 days ago
108
378
apache-2.0
16
AMBA AXI VIP
Created 2018-09-22
113 commits to master branch, last one 7 months ago
45
361
mit
15
Code generation tool for control and status registers
Created 2019-04-10
390 commits to master branch, last one a day ago
39
240
unknown
11
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
Created 2016-09-21
273 commits to master branch, last one about a month ago
46
167
apache-2.0
14
Network on Chip Implementation written in SytemVerilog
Created 2017-12-12
193 commits to master branch, last one 2 years ago
25
152
bsd-3-clause
6
A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
Created 2023-11-30
535 commits to main branch, last one 3 days ago
Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
Created 2020-10-26
45 commits to main branch, last one 3 years ago
26
112
gpl-3.0
12
Control and status register code generator toolchain
Created 2020-04-05
77 commits to main branch, last one 2 months ago
An open-source HDL register code generator fast enough to run in real time.
Created 2023-11-29
551 commits to main branch, last one 4 days ago