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AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Created
2018-04-12
1,318 commits to master branch, last one 28 days ago
AMBA AXI VIP
Created
2018-09-22
113 commits to master branch, last one 7 months ago
Code generation tool for control and status registers
Created
2019-04-10
390 commits to master branch, last one a day ago
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
Created
2016-09-21
273 commits to master branch, last one about a month ago
Network on Chip Implementation written in SytemVerilog
Created
2017-12-12
193 commits to master branch, last one 2 years ago
A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
Created
2023-11-30
535 commits to main branch, last one 3 days ago
Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
Created
2020-10-26
45 commits to main branch, last one 3 years ago
Control and status register code generator toolchain
Created
2020-04-05
77 commits to main branch, last one 2 months ago