lucky-wfw / ARM_AMBA_Design

Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.

Date Created 2020-10-26 (4 years ago)
Commits 45 (last one 3 years ago)
Stargazers 116 (0 this week)
Watchers 3 (0 this week)
Forks 34
License gpl-3.0
Ranking

RepositoryStats indexes 616,861 repositories, of these lucky-wfw/ARM_AMBA_Design is ranked #274,047 (56th percentile) for total stargazers, and #433,549 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #220/601.

lucky-wfw/ARM_AMBA_Design is also tagged with popular topics, for these it's ranked: arm (#272/456),  verilog (#144/299)

Other Information

lucky-wfw/ARM_AMBA_Design has Github issues enabled, there are 2 open issues and 2 closed issues.

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Github watchers over time, collection started in '23

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Recent Commit History

0 commits on the default branch (main) since jan '22

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Issue History

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Languages

The only known language in this repository is Verilog

VerilogVerilog

updated: 2025-02-19 @ 07:52am, id: 307337830 / R_kgDOElGaZg