SystemRDL / PeakRDL

Control and status register code generator toolchain

Date Created 2020-04-05 (4 years ago)

Commits 77 (last one 2 days ago)

Stargazers 108 (1 this week)

Watchers 12 (0 this week)

Forks 25

License gpl-3.0

Ranking

RepositoryStats indexes 595,856 repositories, of these SystemRDL/PeakRDL is ranked #279,684 (53rd percentile) for total stargazers, and #178,842 for total watchers. Github reports the primary language for this repository as Python, for repositories using this language it is ranked #51,854/119,431.

SystemRDL/PeakRDL is also tagged with popular topics, for these it's ranked: command-line-tool (#405/673), fpga (#241/488), verilog (#147/289), eda (#83/142)

Other Information

SystemRDL/PeakRDL has Github issues enabled, there are 2 open issues and 38 closed issues.

There have been 12 releases, the latest one was published on 2024-12-17 (4 days ago) with the name 1.2.3.

Homepage URL: http://peakrdl.readthedocs.io

All Topics

apb axi csr eda uvm amba asic fpga verilog registers systemverilog command-line-tool systemrdl-compiler uvm-register-model register-descriptions hardware-description-language

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

75 commits on the default branch (main) since jan '22

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Issue History

Languages

The primary language is Python but there's also others...

updated: 2024-12-21 @ 12:26pm, id: 253298685 / R_kgDODxkH_Q