riscv-mcu / e203_hbirdv2

The Ultra-Low Power RISC-V Core

Date Created 2020-07-29 (4 years ago)

Commits 51 (last one about a month ago)

Stargazers 1,304 (8 this week)

Watchers 36 (0 this week)

Forks 345

License apache-2.0

Ranking

RepositoryStats indexes 589,162 repositories, of these riscv-mcu/e203_hbirdv2 is ranked #40,131 (93rd percentile) for total stargazers, and #60,051 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #14/549.

riscv-mcu/e203_hbirdv2 is also tagged with popular topics, for these it's ranked: fpga (#24/482), cpu (#47/285), verilog (#21/284), risc-v (#27/265), riscv (#20/167), core (#14/117), china (#29/114)

Other Information

riscv-mcu/e203_hbirdv2 has Github issues enabled, there are 11 open issues and 9 closed issues.

Homepage URL: https://doc.nucleisys.com/hbirdv2

All Topics

cpu soc core e203 fpga china riscv nuclei risc-v verilog low-power hummingbird

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

10 commits on the default branch (master) since jan '22

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Issue History

Languages

The primary language is Verilog but there's also others...

updated: 2024-12-03 @ 11:40am, id: 283417813 / R_kgDOEOSc1Q