riscv-mcu / e203_hbirdv2

The Ultra-Low Power RISC-V Core

Date Created 2020-07-29 (3 years ago)

Commits 46 (last one about a year ago)

Stargazers 1,136 (3 this week)

Watchers 35 (0 this week)

Forks 319

License apache-2.0

Ranking

RepositoryStats indexes 535,551 repositories, of these riscv-mcu/e203_hbirdv2 is ranked #43,056 (92nd percentile) for total stargazers, and #60,918 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #14/461.

riscv-mcu/e203_hbirdv2 is also tagged with popular topics, for these it's ranked: fpga (#28/435), verilog (#24/257), risc-v (#25/227), riscv (#18/148), core (#14/107), china (#29/107)

Other Information

riscv-mcu/e203_hbirdv2 has Github issues enabled, there are 12 open issues and 7 closed issues.

Homepage URL: https://doc.nucleisys.com/hbirdv2

All Topics

cpu soc core e203 fpga china riscv nuclei risc-v verilog low-power hummingbird

Star History

Github stargazers over time

Watcher History

Github watchers over time, collection started in '23

Recent Commit History

5 commits on the default branch (master) since jan '22

Yearly Commits

Commits to the default branch (master) per year

Issue History

Languages

The primary language is Verilog but there's also others...

updated: 2024-07-01 @ 01:02pm, id: 283417813 / R_kgDOEOSc1Q