riscv-mcu / e203_hbirdv2

The Ultra-Low Power RISC-V Core

Date Created 2020-07-29 (4 years ago)

Commits 51 (last one 6 months ago)

Stargazers 1,474 (4 this week)

Watchers 37 (0 this week)

Forks 366

License apache-2.0

Ranking

RepositoryStats indexes 643,405 repositories, of these riscv-mcu/e203_hbirdv2 is ranked #37,404 (94th percentile) for total stargazers, and #58,046 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #14/646.

riscv-mcu/e203_hbirdv2 is also tagged with popular topics, for these it's ranked: fpga (#22/527), verilog (#18/314), cpu (#45/297), risc-v (#27/286), riscv (#20/181), core (#14/124), china (#28/120)

Other Information

riscv-mcu/e203_hbirdv2 has Github issues enabled, there are 11 open issues and 10 closed issues.

Homepage URL: https://doc.nucleisys.com/hbirdv2

All Topics

cpu soc core e203 fpga china riscv nuclei risc-v verilog low-power hummingbird

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

10 commits on the default branch (master) since jan '22

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Issue History

Languages

The primary language is Verilog but there's also others...

updated: 2025-04-26 @ 05:35am, id: 283417813 / R_kgDOEOSc1Q