leonow32 / verilog-fpga

Many peripherals in Verilog ready to use

Date Created 2023-07-05 (about a year ago)
Commits 362 (last one 4 months ago)
Stargazers 26 (0 this week)
Watchers 2 (0 this week)
Forks 3
License mit
Ranking

RepositoryStats indexes 579,238 repositories, of these leonow32/verilog-fpga is ranked #569,475 (2nd percentile) for total stargazers, and #475,806 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #526/533.

leonow32/verilog-fpga is also tagged with popular topics, for these it's ranked: fpga (#472/474),  verilog (#278/279)

Other Information

leonow32/verilog-fpga has 1 open pull request on Github, 66 pull requests have been merged over the lifetime of the repository.

Star History

Github stargazers over time

Watcher History

Github watchers over time, collection started in '23

Recent Commit History

362 commits on the default branch (master) since jan '22

Yearly Commits

Commits to the default branch (master) per year

Issue History

No issues have been posted

Languages

The primary language is Verilog but there's also others...

updated: 2024-10-26 @ 12:39pm, id: 662667491 / R_kgDOJ3-A4w