10 results found Sort:

197
663
bsd-2-clause
32
An abstraction library for interfacing EDA tools
Created 2018-05-09
563 commits to main branch, last one 6 days ago
25
200
gpl-3.0
17
Repurposing existing HDL tools to help writing better code
Created 2016-01-23
390 commits to master branch, last one 2 years ago
《FPGA应用开发和仿真》(机械工业出版社2018年第1版 ISBN:9787111582786)的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
Created 2019-05-31
26 commits to master branch, last one 4 months ago
A JSON library implemented in VHDL.
Created 2015-09-01
61 commits to master branch, last one 2 years ago
6
60
gpl-3.0
9
Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)
This repository has been archived (exclude archived)
Created 2015-09-18
267 commits to master branch, last one 5 years ago
42
54
mit
4
Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)
Created 2019-12-30
60 commits to master branch, last one about a year ago
The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equiva...
Created 2022-10-04
6 commits to main branch, last one 2 years ago
Portable HyperRAM controller
Created 2022-01-07
164 commits to main_old branch, last one 4 months ago
The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA b...
Created 2022-07-28
27 commits to main branch, last one 10 months ago