5 results found Sort:

ZipCPU
wb2axip ZipCPU
110
548
unknown
30
Bus bridges and other odds and ends
fpga gplv3 xilinx axi-bus wishbone wishbone-bus xilinx-vivado
Created 2016-09-21
500 commits to master branch, last one 12 days ago
suoto
hdl_checker suoto
26
207
gpl-3.0
16
Repurposing existing HDL tools to help writing better code
hdl vim ghdl vhdl python xilinx verilog vim-ale coc-nvim modelsim emacs-lsp questasim lsp-server hdl-checker mentor-msim systemverilog xilinx-vivado syntax-checker language-server vivado-simulator
Created 2016-01-23
390 commits to master branch, last one 3 years ago
derekmulcahy
xvcpi derekmulcahy
28
113
cc0-1.0
10
Xilinx Virtual Cable Server for Raspberry Pi
jtag zynq xilinx-fpga snickerdoodle xilinx-vivado
Created 2017-04-19
9 commits to master branch, last one 3 years ago
acageduser
DMA-Attack-Firmware-Customization acageduser
15
97
mit
1
This cybersecurity guide provides a comprehensive approach to hardware obfuscation using LambdaConcept's PCIe Screamer Squirrel DMA board. It is intended for educational and research purposes only.
dma arbor pcileech visual-studio xilinx-vivado
Created 2024-07-27
270 commits to main branch, last one 16 hours ago
ekb0412
100DaysofRTL ekb0412
13
75
apache-2.0
4
"100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado
asic fpga verilog-hdl vlsi-design xilinx-vivado digital-system-design
Created 2023-03-26
180 commits to main branch, last one about a year ago