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zslwyuan
Basic-SIMD-Processor-Verilog-Tutorial zslwyuan
33
125
gpl-3.0
6
Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clo...
alu cpu simd adder verilog processor multiplier verilog-project cadence-virtuoso processor-design instruction-set-architecture
Created 2018-10-31
10 commits to master branch, last one 2 years ago
Johnlon
spam-1 Johnlon
8
64
mpl-2.0
5
Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my research and learning. See also the Hackaday.IO project. https:/...
alu cpu rom ttl 8bit cmos vhdl design logism verilog assembler homebrew-cpu verilog-components
Created 2019-08-03
1,004 commits to master branch, last one about a year ago
edson-acordi
4bit-microcomputer edson-acordi
2
58
other
5
MikroLeo project files (schematic, PCB, assembler, emulator/debugger, circuit simulation file, documentation, example of programs etc). MikroLeo is a 4-bit microcomputer developed mainly for education...
alu asm cpu oshw risc 4-bit nibble 74hctxxx computer didactic assembler education logic-gates open-source programming microcomputer assembly-language digital-electronics harvard-architecture
Created 2020-01-18
328 commits to master branch, last one 8 months ago
RomeoMe5
DDLM RomeoMe5
42
53
mit
3
Исходные коды к главам книги "Цифровой синтез: практический курс" (под ред. А.Ю. Романова и Ю.В. Панчула)
alu fsm hse tcl ddlm labs miem mips quartus terasic verilog modelsim dmk-press schoolmips verilog-book quartus-prime system-verilog verilog-designs mips-architecture terasic-de10-lite
Created 2019-12-30
60 commits to master branch, last one about a year ago