5 results found Sort:

AngeloJacobo
UberDDR3 AngeloJacobo
41
309
gpl-3.0
9
Opensource DDR3 Controller
phy ddr3 fpga verilog ddr3-phy controller ddr3-controller memory-controller
Created 2023-03-02
442 commits to main branch, last one 19 days ago
1a2m3
SPD-Reader-Writer 1a2m3
18
112
gpl-3.0
2
SPD Reader & Writer with Software Write Protection capabilities supporting Arduino and SMBus
amd ddr spd ddr2 ddr3 ddr4 ddr5 rswp intel sdram smbus nvidia arduino windows spd-reader spd-writer eeprom-reader eeprom-programmer
Created 2020-05-26
719 commits to master branch, last one about a year ago
BrianHGinc
BrianHG-DDR3-Controller BrianHGinc
32
76
unknown
7
DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
hdl ddr3 fpga intel altera xilinx lattice verilog testbenches systemverilog
Created 2021-08-29
110 commits to main branch, last one about a year ago
someone755
ddr3-controller someone755
11
68
unknown
3
A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs
ddr3 fpga verilog memory-controller
Created 2022-07-09
15 commits to master branch, last one 2 years ago
CY0807
BRAM_DDR3_HDMI CY0807
6
25
unknown
1
在FPGA中将图像数据输入到DDR3中，再输送到HDMI接口上进行显示。
ddr3 fpga hdmi vhdl verilog
Created 2023-02-04
9 commits to main branch, last one 2 years ago