CY0807 / BRAM_DDR3_HDMI

在FPGA中将图像数据输入到DDR3中，再输送到HDMI接口上进行显示。

CY0807
CY0807
Date Created 2023-02-04 (2 years ago)
Commits 9 (last one 2 years ago)
Stargazers 25 (0 this week)
Watchers 1 (0 this week)
Forks 6
License unknown
Ranking

RepositoryStats indexes 635,689 repositories, of these CY0807/BRAM_DDR3_HDMI is ranked #627,337 (1st percentile) for total stargazers, and #559,689 for total watchers. Github reports the primary language for this repository as VHDL, for repositories using this language it is ranked #200/201.

CY0807/BRAM_DDR3_HDMI is also tagged with popular topics, for these it's ranked: fpga (#517/520),  verilog (#306/310)

All Topics
ddr3 fpga hdmi vhdl verilog

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

9 commits on the default branch (main) since jan '22

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Yearly Commits

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Issue History

No issues have been posted

Languages

The primary language is VHDL but there's also others...

VHDLVHDLVerilogVerilogVVSystemVerilogSystemVerilogShellShellTclTclHTMLHTMLJavaScriptJavaScriptStataStataOtherOtherForthForth

updated: 2025-03-21 @ 04:21pm, id: 597357485 / R_kgDOI5rzrQ