Statistics for language VHDL

Open Logic FPGA Standard Library

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

No description

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.

VHDL compiler and simulator

No description

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.

Open Logic FPGA Standard Library

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

VHDL compiler and simulator

Open Logic FPGA Standard Library

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

No description

VHDL compiler and simulator

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future...

FPGA implementation of pose detection with Kalman filter. (verilog)

No description

A VHDL IP for ECC (Elliptic Curve Cryptography) hardware acceleration

Open Logic FPGA Standard Library

No description

VHDL 2008/93/87 simulator

Open Logic FPGA Standard Library

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

保存一下我自己整理的北理工计科的学习资料，欢迎分享资源

FPGA Hardware Implementation for SLAM

Homeworks and projects suits for BJUTers major in CS

No description

FPGA implementation of pose detection with Kalman filter. (verilog)

TJCS-Undergraduate-Courses

Open Logic FPGA Standard Library

No description

ChisFlash is an open-source GBA🎮 flashcart that supports 1M of save type.

Homeworks and projects suits for BJUTers major in CS

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door...

Open Logic FPGA Standard Library

:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

VHDL 2008/93/87 simulator

SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

A collection of reusable, high-quality, peer-reviewed VHDL building blocks.

No description

Code Repository for The FPGA Programming Handbook Second Edition, Published by Packt

Commodore C64 core for the Tang Nano 20K Primer 25K Mega 60k and Mega 138K Pro FPGA

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door...