chili-chips-ba / wireguard-fpga

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!

Date Created 2024-07-13 (4 months ago)

Commits 79 (last one 3 hours ago)

Stargazers 33 (0 this week)

Watchers 9 (0 this week)

Forks 0

License bsd-3-clause

Ranking

RepositoryStats indexes 584,353 repositories, of these chili-chips-ba/wireguard-fpga is ranked #546,732 (6th percentile) for total stargazers, and #224,040 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #162/173.

chili-chips-ba/wireguard-fpga is also tagged with popular topics, for these it's ranked: embedded (#634/655), vpn (#573/592), fpga (#461/478), verilog (#272/282), wireguard (#265/276), risc-v (#250/263)

Other Information

chili-chips-ba/wireguard-fpga has Github issues enabled, there are 6 open issues and 0 closed issues.

Homepage URL: https://nlnet.nl/project/KlusterLab-Wireguard

All Topics

iss rtl vpn fpga vproc cocotb risc-v verilog embedded verilator wireguard

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

78 commits on the default branch (main) since jan '22

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Issue History

Languages

The primary language is SystemVerilog but there's also others...

updated: 2024-11-21 @ 08:05am, id: 828348416 / R_kgDOMV-YAA