2 results found Sort:

AngeloJacobo
UberDDR3 AngeloJacobo
30
186
gpl-3.0
10
Opensource DDR3 Controller
phy ddr3 fpga verilog ddr3-phy controller ddr3-controller memory-controller
Created 2023-03-02
363 commits to main branch, last one 12 days ago
someone755
ddr3-controller someone755
10
60
unknown
4
A DDR3(L) PHY and controller, written in Verilog, for Xilinx 7-Series FPGAs
ddr3 fpga verilog memory-controller
Created 2022-07-09
15 commits to master branch, last one about a year ago