51 results found Sort:

Digital logic design tool and simulator
Created 2014-09-19
5,059 commits to main branch, last one 3 days ago
446
4.4k
gpl-3.0
90
A digital logic designer and circuit simulator.
Created 2016-06-28
4,546 commits to master branch, last one 25 days ago
201
2.0k
apache-2.0
47
An app for catching up on things.
Created 2016-04-25
3,189 commits to main branch, last one 6 days ago
107
1.3k
apache-2.0
15
Node.js circuit breaker - fails fast ⚡️
Created 2016-10-30
765 commits to main branch, last one 9 days ago
174
1.1k
gpl-3.0
42
Create multiple TOR instances with a load-balancing.
Created 2018-01-11
431 commits to master branch, last one a day ago
114
883
gpl-2.0
39
Qucs-S is a circuit simulation program with Qt-based GUI
Created 2017-07-02
5,636 commits to current branch, last one 2 days ago
137
809
bsd-2-clause
79
Genetic circuit design automation
Created 2015-12-12
101 commits to develop branch, last one 4 years ago
48
765
apache-2.0
14
An efficient and feature complete Hystrix like Go implementation of the circuit breaker pattern.
Created 2017-12-23
179 commits to master branch, last one about a month ago
Fastest-lap is a vehicle dynamics simulator. It can be used to understand vehicle dynamics, to learn about driving techniques, to design car prototypes, or just for fun!
Created 2021-11-26
204 commits to main branch, last one about a year ago
📚 💻 Great Resources for Electronics Enthusiasts
Created 2017-01-30
93 commits to master branch, last one 5 years ago
132
464
lgpl-3.0
29
ABY - A Framework for Efficient Mixed-protocol Secure Two-party Computation
Created 2014-11-28
347 commits to public branch, last one 3 years ago
A free, open source, online digital circuit/logic designer.
Created 2017-03-22
4,300 commits to master branch, last one 9 months ago
A user-friendly program for making electronic circuit diagrams.
Created 2015-03-19
336 commits to master branch, last one 3 months ago
⚡ An interactive electronic circuit simulator
Created 2015-07-21
404 commits to master branch, last one 8 years ago
Spice# is a cross-platform electronic circuit simulator based on Berkeley Spice - the mother of commercial industry-standard circuit simulators.
Created 2017-06-06
1,241 commits to master branch, last one about a month ago
基于 MkDocs & Material theme 的个人知识库
Created 2022-02-09
1,377 commits to main branch, last one 4 months ago
37
208
gpl-2.0
27
GPL Electronic Design Automation
Created 2009-01-23
16,558 commits to master branch, last one 17 hours ago
A network map panel for Grafana
Created 2018-01-12
273 commits to master branch, last one 3 years ago
49
195
unknown
27
Arduino Text-to-Speech Library
Created 2013-02-02
64 commits to master branch, last one about a year ago
51
194
unknown
8
Noname: a programming language to write zkapps
Created 2022-06-06
630 commits to main branch, last one 8 days ago
40
148
gpl-3.0
10
Logisim Italian Fork
Created 2017-04-21
428 commits to master branch, last one 2 years ago
19
127
gpl-3.0
8
DeckBox for Pokémon TCG: https://play.google.com/store/apps/details?id=com.r0adkll.deckbuilder
Created 2018-04-26
221 commits to modern branch, last one 2 months ago
A Simulative MIPS CPU running on Logisim.
Created 2015-11-26
172 commits to main branch, last one 2 years ago
eurorack modular synthesizers projects using Arduino.
Created 2021-03-18
55 commits to master branch, last one 9 months ago
A browser-based SPICE circuit simulator
Created 2020-10-12
306 commits to main branch, last one a day ago
Instructions and code for using a Raspberry Pi as an IR remote control
Created 2017-10-14
76 commits to master branch, last one about a year ago
19
95
mit
4
A Zero-Knowledge Protocol for Provable User Data Management
Created 2021-09-03
1,222 commits to main branch, last one about a month ago
D3.js and ELK based schematic visualizer
Created 2018-06-20
332 commits to master branch, last one 8 months ago
22
92
bsd-3-clause
14
A flexible framework for analyzing and transforming FPGA netlists. Official repository.
Created 2019-09-23
875 commits to master branch, last one about a year ago
A Standalone Structural Verilog Parser
Created 2019-01-04
67 commits to master branch, last one 3 years ago