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gpl-3.0

Digital logic design tool and simulator

fpga vhdl logic circuit logisim verilog circuits education simulator digital-logic timing-diagram digital-circuit digital-circuits logisim-evolution digital-logic-design

Created 2014-09-19

5,281 commits to main branch, last one 14 hours ago

unknown

华中科技大学计算机个人资料合集:课设/实验报告等。tag:数电实验交通灯，C++实验华为，C语言实验，数据结构实验，洛谷算法实验，数据结构课设SAT数独求解器，电路理论，Java，计基实验

cpp hust java experiment sat-solver data-structures digital-circuit english-learning curriculum-project algorithms-and-data-structures

Created 2024-11-20

213 commits to main branch, last one 8 days ago