tomas-fryza / vhdl-labs

VHDL course at Brno University of Technology

tomas-fryza
tomas-fryza
Date Created 2020-01-17 (5 years ago)
Commits 1,520 (last one 23 hours ago)
Stargazers 103 (0 this week)
Watchers 9 (0 this week)
Forks 230
License mit
Ranking

RepositoryStats indexes 622,269 repositories, of these tomas-fryza/vhdl-labs is ranked #297,514 (52nd percentile) for total stargazers, and #228,148 for total watchers. Github reports the primary language for this repository as Tcl, for repositories using this language it is ranked #59/135.

tomas-fryza/vhdl-labs is also tagged with popular topics, for these it's ranked: fpga (#256/505)

Other Information

There have been 5 releases, the latest one was published on 2024-07-11 (7 months ago) with the name 2024-07.

Star History

Github stargazers over time

1201201001008080606040402020002021202120222022202320232024202420252025

Watcher History

Github watchers over time, collection started in '23

9999998.58.588888820232023Feb '23Feb '23Apr '23Apr '23Jun '23Jun '23Aug '23Aug '23Oct '23Oct '23Dec '23Dec '23Feb '24Feb '24Apr '24Apr '24Jun '24Jun '24Aug '24Aug '24Oct '24Oct '24Dec '24Dec '24Feb '25Feb '25

Recent Commit History

673 commits on the default branch (master) since jan '22

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Yearly Commits

Commits to the default branch (master) per year

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Issue History

Total Issues
Open Issues
Closed Issues
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Languages

The primary language is Tcl but there's also others...

TclTclVHDLVHDLShellShellC++C++VerilogVerilog

updated: 2025-03-04 @ 04:29am, id: 234491188 / R_kgDODfoNNA