dom0ng / pcileech-wifi-v2

pcileech-fpga with wireless card emulation (D-Link DWA-556 Xtreme N PCIe Desktop Adapter)

Date Created 2024-06-10 (9 months ago)
Commits 14 (last one 5 months ago)
Stargazers 101 (0 this week)
Watchers 4 (0 this week)
Forks 35
License unknown
Ranking

RepositoryStats indexes 630,443 repositories, of these dom0ng/pcileech-wifi-v2 is ranked #304,317 (52nd percentile) for total stargazers, and #365,214 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #249/616.

Star History

Github stargazers over time

120120100100808060604040202000Jul '24Jul '24Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25Mar '25Mar '25

Watcher History

Github watchers over time, collection started in '23

44443333332222Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25Mar '25Mar '25

Recent Commit History

14 commits on the default branch (main) since jan '22

1414121210108866442200Jul '24Jul '24Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25Mar '25Mar '25

Yearly Commits

Commits to the default branch (main) per year

141412121010886644220020242024

Issue History

Total Issues
Open Issues
Closed Issues
443.53.5332.52.5221.51.5110.50.500Aug '24Aug '24Sep '24Sep '24Oct '24Oct '24Nov '24Nov '24Dec '24Dec '2420252025Feb '25Feb '25Mar '25Mar '25

Languages

The primary language is Verilog but there's also others...

VerilogVerilogTclTclSystemVerilogSystemVerilogBatchfileBatchfile

updated: 2025-03-21 @ 05:55pm, id: 813185225 / R_kgDOMHg4yQ