renyangang / riscv-mcu
This project utilizes the Digital circuit simulation software,to build a CPU that supports a simple instruction set and simple peripheral circuit simulation. The goal is to support system boot, startup, operation, interrupt handling, peripheral control, and other functions.
RepositoryStats indexes 600,333 repositories, of these renyangang/riscv-mcu is ranked #544,068 (9th percentile) for total stargazers, and #488,054 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #509/571.
Star History
Github stargazers over time
Watcher History
Github watchers over time, collection started in '23
Recent Commit History
85 commits on the default branch (master) since jan '22
Yearly Commits
Commits to the default branch (master) per year
Issue History
Languages
The primary language is Verilog but there's also others...
updated: 2024-12-24 @ 11:18pm, id: 844918586 / R_kgDOMlxvOg