chipsalliance / caliptra-rtl

HW Design Collateral for Caliptra RoT IP

chipsalliance
chipsalliance
Date Created 2023-02-14 (about a year ago)
Commits 559 (last one 12 days ago)
Stargazers 79 (2 this week)
Watchers 32 (0 this week)
Forks 41
License apache-2.0
Ranking

RepositoryStats indexes 600,333 repositories, of these chipsalliance/caliptra-rtl is ranked #347,138 (42nd percentile) for total stargazers, and #68,585 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #93/183.

Other Information

chipsalliance/caliptra-rtl has 14 open pull requests on Github, 258 pull requests have been merged over the lifetime of the repository.

Github issues are enabled, there are 75 open issues and 283 closed issues.

There have been 5 releases, the latest one was published on 2024-07-03 (6 months ago) with the name Caliptra RTL v1.1.

Star History

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

559 commits on the default branch (main) since jan '22

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Issue History

Languages

The primary language is SystemVerilog but there's also others...

updated: 2025-01-04 @ 04:39am, id: 601754932 / R_kgDOI94NNA