dawsonjon / fpu

synthesiseable ieee 754 floating point library in verilog

dawsonjon
dawsonjon
Date Created 2013-12-07 (11 years ago)
Commits 38 (last one 3 years ago)
Stargazers 592 (8 this week)
Watchers 24 (0 this week)
Forks 152
License mit
Ranking

RepositoryStats indexes 632,768 repositories, of these dawsonjon/fpu is ranked #83,516 (87th percentile) for total stargazers, and #90,599 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #44/618.

Other Information

dawsonjon/fpu has 1 open pull request on Github, 1 pull request has been merged over the lifetime of the repository.

Github issues are enabled, there are 11 open issues and 14 closed issues.

Star History

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Watcher History

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Recent Commit History

0 commits on the default branch (master) since jan '22

Inactive

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Issue History

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Languages

The primary language is Verilog but there's also others...

VerilogVerilogPythonPythonC++C++

updated: 2025-03-27 @ 10:22pm, id: 15008590 / R_kgDOAOUDTg