ispras / hdl-benchmarks

Collection of digital hardware modules & projects (benchmarks)

ispras
ispras
Date Created 2019-10-03 (5 years ago)
Commits 94 (last one 4 months ago)
Stargazers 51 (2 this week)
Watchers 14 (0 this week)
Forks 11
License other
Ranking

RepositoryStats indexes 632,768 repositories, of these ispras/hdl-benchmarks is ranked #484,642 (23rd percentile) for total stargazers, and #151,491 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #440/618.

Other Information

ispras/hdl-benchmarks has Github issues enabled, there is 1 open issue and 6 closed issues.

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

41 commits on the default branch (master) since jan '22

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Yearly Commits

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Issue History

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Languages

The primary language is Verilog but there's also others...

VerilogVerilogVHDLVHDLHTMLHTMLCCTclTclRoffRoffMakefileMakefilePerlPerlBatchfileBatchfile

updated: 2025-03-25 @ 02:57am, id: 212624422 / R_kgDODKxkJg