PR77 / A500_ACCEL_RAM_IDE-Rev-2

Improved design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface

Date Created 2018-02-19 (6 years ago)

Commits 41 (last one 4 months ago)

Stargazers 51 (0 this week)

Watchers 13 (0 this week)

Forks 5

License gpl-3.0

Ranking

RepositoryStats indexes 595,856 repositories, of these PR77/A500_ACCEL_RAM_IDE-Rev-2 is ranked #463,222 (22nd percentile) for total stargazers, and #166,788 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #406/563.

PR77/A500_ACCEL_RAM_IDE-Rev-2 is also tagged with popular topics, for these it's ranked: ide (#410/475)

Other Information

PR77/A500_ACCEL_RAM_IDE-Rev-2 has Github issues enabled, there are 2 open issues and 8 closed issues.

There have been 1 release, the latest one was published on 2019-06-13 (5 years ago) with the name Initial release.

All Topics

ide cpld amiga fastram mc68000 accelerator

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4 commits on the default branch (master) since jan '22

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The primary language is Verilog but there's also others...

updated: 2024-12-03 @ 07:11am, id: 122122299 / R_kgDOB0dwOw