PR77 / A500_ACCEL_RAM_IDE-Rev-2

Improved design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface

PR77
PR77
Date Created 2018-02-19 (7 years ago)
Commits 41 (last one 7 months ago)
Stargazers 53 (0 this week)
Watchers 12 (0 this week)
Forks 5
License gpl-3.0
Ranking

RepositoryStats indexes 625,486 repositories, of these PR77/A500_ACCEL_RAM_IDE-Rev-2 is ranked #468,114 (25th percentile) for total stargazers, and #172,537 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #418/609.

PR77/A500_ACCEL_RAM_IDE-Rev-2 is also tagged with popular topics, for these it's ranked: ide (#424/491)

Other Information

PR77/A500_ACCEL_RAM_IDE-Rev-2 has Github issues enabled, there are 2 open issues and 8 closed issues.

There have been 1 release, the latest one was published on 2019-06-13 (5 years ago) with the name Initial release.

Star History

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Recent Commit History

4 commits on the default branch (master) since jan '22

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Issue History

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Languages

The primary language is Verilog but there's also others...

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updated: 2025-03-07 @ 04:57am, id: 122122299 / R_kgDOB0dwOw