RuSys / Verugent

Verilog generation tool written in Rust

RuSys
RuSys
Date Created 2018-07-26 (6 years ago)
Commits 51 (last one about a year ago)
Stargazers 58 (0 this week)
Watchers 5 (0 this week)
Forks 5
License apache-2.0
Ranking

RepositoryStats indexes 632,894 repositories, of these RuSys/Verugent is ranked #444,539 (30th percentile) for total stargazers, and #323,843 for total watchers. Github reports the primary language for this repository as Rust, for repositories using this language it is ranked #12,486/18,426.

RuSys/Verugent is also tagged with popular topics, for these it's ranked: rust (#5,812/7750)

Other Information

RuSys/Verugent has Github issues enabled, there is 1 open issue and 2 closed issues.

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

1 commits on the default branch (master) since jan '22

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Yearly Commits

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Issue History

Total Issues
Open Issues
Closed Issues
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Languages

The only known language in this repository is Rust

RustRust

updated: 2025-03-06 @ 11:43pm, id: 142471289 / R_kgDOCH3weQ