SparcLab / OpenSERDES

Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.

Date Created 2020-07-19 (4 years ago)

Commits 40 (last one 2 years ago)

Stargazers 142 (0 this week)

Watchers 12 (0 this week)

Forks 30

License gpl-3.0

Ranking

RepositoryStats indexes 584,777 repositories, of these SparcLab/OpenSERDES is ranked #228,058 (61st percentile) for total stargazers, and #177,637 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #157/535.

Other Information

SparcLab/OpenSERDES has Github issues enabled, there are 7 open issues and 0 closed issues.

All Topics

serdes openpdk openlane skywater digitalarchitecture

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Recent Commit History

1 commits on the default branch (master) since jan '22

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Languages

The primary language is Verilog but there's also others...

updated: 2024-11-18 @ 09:53pm, id: 280966514 / R_kgDOEL81cg