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JackonYang
paper-reading JackonYang
36
224
mit
7
比做算法的懂工程落地，比做工程的懂算法模型。
llm tvm mlir arxiv chip-design computer-architecture
Created 2018-05-08
147 commits to master branch, last one 3 months ago
patrickschulz
openPCells patrickschulz
6
46
gpl-3.0
7
Parametric layout generator for digital, analog and mixed-signal integrated circuits
lua analog pcells cadence chip-design parametric-cells layout-automation integrated-circuits
Created 2020-05-19
3,426 commits to master branch, last one about a month ago