yuri-panchul / systemverilog-homework

SystemVerilog language-oriented exercises

Date Created 2023-09-25 (about a year ago)
Commits 126 (last one a day ago)
Stargazers 73 (4 this week)
Watchers 7 (0 this week)
Forks 87
License mit
Ranking

RepositoryStats indexes 633,155 repositories, of these yuri-panchul/systemverilog-homework is ranked #384,380 (39th percentile) for total stargazers, and #261,640 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #109/196.

Other Information

yuri-panchul/systemverilog-homework has 1 open pull request on Github, 17 pull requests have been merged over the lifetime of the repository.

Github issues are enabled, there is 1 open issue and 1 closed issue.

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

126 commits on the default branch (main) since jan '22

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Yearly Commits

Commits to the default branch (main) per year

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Issue History

Total Issues
Open Issues
Closed Issues
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Languages

The primary language is SystemVerilog but there's also others...

SystemVerilogSystemVerilogTclTclShellShellBatchfileBatchfileAssemblyAssembly

updated: 2025-03-30 @ 02:02pm, id: 696364655 / R_kgDOKYGubw