chipsalliance / UHDM

Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

Date Created 2019-12-13 (5 years ago)

Commits 2,177 (last one about a month ago)

Stargazers 204 (0 this week)

Watchers 19 (0 this week)

Forks 40

License apache-2.0

Ranking

RepositoryStats indexes 598,732 repositories, of these chipsalliance/UHDM is ranked #179,088 (70th percentile) for total stargazers, and #117,268 for total watchers. Github reports the primary language for this repository as C++, for repositories using this language it is ranked #10,118/32,003.

chipsalliance/UHDM is also tagged with popular topics, for these it's ranked: serialization (#168/389)

Other Information

chipsalliance/UHDM has Github issues enabled, there are 15 open issues and 100 closed issues.

There have been 2 releases, the latest one was published on 2024-08-07 (4 months ago) with the name 1.84 Latest stable.

All Topics

vpi-api listener ieee-standard serialization systemverilog vpi-interface

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968 commits on the default branch (master) since jan '22

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The primary language is C++ but there's also others...

updated: 2024-12-26 @ 02:53am, id: 227755581 / R_kgDODZNGPQ