chipsalliance / UHDM

Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format in between SystemVerilog tools. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

Date Created 2019-12-13 (4 years ago)

Commits 2,175 (last one about a month ago)

Stargazers 198 (0 this week)

Watchers 20 (0 this week)

Forks 40

License apache-2.0

Ranking

RepositoryStats indexes 579,555 repositories, of these chipsalliance/UHDM is ranked #178,965 (69th percentile) for total stargazers, and #110,374 for total watchers. Github reports the primary language for this repository as C++, for repositories using this language it is ranked #10,082/31,036.

chipsalliance/UHDM is also tagged with popular topics, for these it's ranked: serialization (#169/384)

Other Information

chipsalliance/UHDM has Github issues enabled, there are 15 open issues and 100 closed issues.

There have been 2 releases, the latest one was published on 2024-08-07 (3 months ago) with the name 1.84 Latest stable.

All Topics

vpi-api listener ieee-standard serialization systemverilog vpi-interface

Star History

Github stargazers over time

Watcher History

Github watchers over time, collection started in '23

Recent Commit History

966 commits on the default branch (master) since jan '22

Yearly Commits

Commits to the default branch (master) per year

Issue History

Languages

The primary language is C++ but there's also others...

updated: 2024-10-23 @ 01:47pm, id: 227755581 / R_kgDODZNGPQ