Jed-Z / computer-organization-lab

中山大学计算机组成原理实验 (2018 秋):用 Verilog 设计并实现的简易单周期和多周期 CPU

Date Created 2019-01-26 (5 years ago)
Commits 10 (last one 3 years ago)
Stargazers 92 (0 this week)
Watchers 3 (0 this week)
Forks 26
License unknown
Ranking

RepositoryStats indexes 597,394 repositories, of these Jed-Z/computer-organization-lab is ranked #311,864 (48th percentile) for total stargazers, and #428,216 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #246/564.

Jed-Z/computer-organization-lab is also tagged with popular topics, for these it's ranked: cpu (#183/286)

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The only known language in this repository is Verilog

updated: 2024-12-13 @ 12:26am, id: 167665918 / R_kgDOCf5g_g