Jed-Z / computer-organization-lab

中山大学计算机组成原理实验 (2018 秋):用 Verilog 设计并实现的简易单周期和多周期 CPU

Date Created 2019-01-26 (6 years ago)
Commits 10 (last one 3 years ago)
Stargazers 94 (0 this week)
Watchers 3 (0 this week)
Forks 28
License unknown
Ranking

RepositoryStats indexes 610,149 repositories, of these Jed-Z/computer-organization-lab is ranked #312,083 (49th percentile) for total stargazers, and #430,783 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #249/592.

Jed-Z/computer-organization-lab is also tagged with popular topics, for these it's ranked: cpu (#187/295)

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The only known language in this repository is Verilog

updated: 2025-01-21 @ 06:48pm, id: 167665918 / R_kgDOCf5g_g