Jed-Z / computer-organization-lab

中山大学计算机组成原理实验 (2018 秋)：用 Verilog 设计并实现的简易单周期和多周期 CPU

Jed-Z
Jed-Z
Date Created 2019-01-26 (6 years ago)
Commits 10 (last one 4 years ago)
Stargazers 94 (0 this week)
Watchers 2 (0 this week)
Forks 27
License unknown
Ranking

RepositoryStats indexes 632,768 repositories, of these Jed-Z/computer-organization-lab is ranked #319,783 (49th percentile) for total stargazers, and #481,481 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #260/618.

Jed-Z/computer-organization-lab is also tagged with popular topics, for these it's ranked: cpu (#186/298)

Other Information

Jed-Z/computer-organization-lab has Github issues enabled, there is 1 open issue and 0 closed issues.

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Watcher History

Github watchers over time, collection started in '23

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Recent Commit History

0 commits on the default branch (master) since jan '22

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Languages

The only known language in this repository is Verilog

VerilogVerilog

updated: 2025-03-26 @ 10:11am, id: 167665918 / R_kgDOCf5g_g