RC4ML / Shuhai

Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA

Date Created 2020-01-22 (4 years ago)

Commits 66 (last one about a year ago)

Stargazers 96 (1 this week)

Watchers 8 (0 this week)

Forks 20

License unknown

Ranking

RepositoryStats indexes 584,777 repositories, of these RC4ML/Shuhai is ranked #298,641 (49th percentile) for total stargazers, and #244,849 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #75/173.

RC4ML/Shuhai is also tagged with popular topics, for these it's ranked: benchmark (#441/757), fpga (#262/478)

Other Information

RC4ML/Shuhai has Github issues enabled, there are 2 open issues and 5 closed issues.

All Topics

ddr hbm fpga benchmark

Star History

Github stargazers over time

Watcher History

Github watchers over time, collection started in '23

Recent Commit History

2 commits on the default branch (master) since jan '22

Yearly Commits

Commits to the default branch (master) per year

Issue History

Languages

The primary language is SystemVerilog but there's also others...

updated: 2024-11-21 @ 06:38pm, id: 235525028 / R_kgDODgnTpA