RC4ML / Shuhai

Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA [FCCM 20]

Date Created 2020-01-22 (4 years ago)
Commits 66 (last one about a year ago)
Stargazers 97 (0 this week)
Watchers 8 (0 this week)
Forks 20
License unknown
Ranking

RepositoryStats indexes 595,856 repositories, of these RC4ML/Shuhai is ranked #300,509 (50th percentile) for total stargazers, and #246,776 for total watchers. Github reports the primary language for this repository as SystemVerilog, for repositories using this language it is ranked #76/178.

RC4ML/Shuhai is also tagged with popular topics, for these it's ranked: benchmark (#446/777),  fpga (#266/488)

Other Information

RC4ML/Shuhai has Github issues enabled, there are 2 open issues and 5 closed issues.

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2 commits on the default branch (master) since jan '22

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The primary language is SystemVerilog but there's also others...

updated: 2024-12-11 @ 05:56pm, id: 235525028 / R_kgDODgnTpA