WangXuan95 / UniPlug-FPGA

一个FPGA核心板设计，体积小、低成本、易用、扩展性强。

WangXuan95
WangXuan95
Date Created 2021-09-27 (3 years ago)
Commits 21 (last one about a year ago)
Stargazers 82 (0 this week)
Watchers 2 (0 this week)
Forks 16
License gpl-3.0
Ranking

RepositoryStats indexes 628,047 repositories, of these WangXuan95/UniPlug-FPGA is ranked #349,417 (44th percentile) for total stargazers, and #479,081 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #288/609.

WangXuan95/UniPlug-FPGA is also tagged with popular topics, for these it's ranked: fpga (#309/508),  pcb (#124/250)

Star History

Github stargazers over time

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Watcher History

Github watchers over time, collection started in '23

3333332.52.522222220232023Jul '23Jul '2320242024Jul '24Jul '2420252025

Recent Commit History

13 commits on the default branch (main) since jan '22

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Yearly Commits

Commits to the default branch (main) per year

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Issue History

Total Issues
Open Issues
Closed Issues
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Languages

The primary language is Verilog but there's also others...

VerilogVerilogTclTcl

updated: 2025-03-08 @ 10:02am, id: 410775470 / R_kgDOGHvvrg