WangXuan95 / UniPlug-FPGA

一个FPGA核心板设计,体积小、低成本、易用、扩展性强。

Date Created 2021-09-27 (3 years ago)
Commits 21 (last one about a year ago)
Stargazers 79 (0 this week)
Watchers 3 (0 this week)
Forks 14
License gpl-3.0
Ranking

RepositoryStats indexes 600,333 repositories, of these WangXuan95/UniPlug-FPGA is ranked #347,138 (42nd percentile) for total stargazers, and #429,661 for total watchers. Github reports the primary language for this repository as Verilog, for repositories using this language it is ranked #280/571.

WangXuan95/UniPlug-FPGA is also tagged with popular topics, for these it's ranked: fpga (#308/490),  pcb (#124/235)

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Watcher History

Github watchers over time, collection started in '23

Recent Commit History

13 commits on the default branch (main) since jan '22

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Languages

The primary language is Verilog but there's also others...

updated: 2024-12-20 @ 05:22am, id: 410775470 / R_kgDOGHvvrg